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The world's largest chip, wants to achieve 4000 times improvement with light interconnection

Cerebras, a developer of wafer-scale processors, is working on an optical subroutine to improve its system performance by 4,000 times and is calling for industry collaboration and standardization. The current Cerebras WSE3 processor is built on a 300mm wafer with 9 million transistors and a power consumption of 20kW. The California-based company has had to develop its own wafer-scale packages for I/O, power delivery and cooling, and is currently working on optical interconnects. The company's chief systems architect spoke at Leti Innovation Day in Grenoble, France, this week, exploring how to address scalability challenges with small chips and 3D heterogeneous packaging technology. "It's not a small chip, but it's still a candidate for 3D integration," said JP Fricker, Cerebras co-founder and chief system architect. "This technology will be transformative." However, a key limitation for performance, scalability, and power consumption is off-chip I/O. "I/O is a limitation of large computing that prevents you from getting into very large systems. These technologies exist today, but we need to invent technologies to put them together. We are developing these technologies and our goal is to build supercomputers that are 4,000 times faster than today and connect 1,000 wafers together." "Currently, I/O is located on both edges of the chip, but it works better if I/O is distributed across the chip. Shortening the channel length reduces the size of the SERDES, saving space and power." "We want to have a lot of optical engines," he said. "Right now they're external, but eventually we'll put these lasers in a chip." These will be used for multiple communication channels with reasonable data rates of 100 to 200Gbit/s, rather than thick pipes, he said. "We have our own wafer-level engine and take third-party wafer-level programmable optical interconnects and put them together, using the entire surface of the wafer to connect to the wafer," he said. "It requires a heterogeneous wafer-to-wafer package." Companies such as Celestia AI and LightMatter have been developing these optical interconnect technologies, especially for hyperscale and AI chip companies. "But we need to invent or repurpose technology. The current interconnect pitch is too thick and we can't get fabs willing to integrate the technology because it's too niche, so we need to create a different process. Hybrid bonding enables finer pitch and higher assembly yields below 12 microns, but it is only available in specific fabs, and there are limited process pairs in fabs, such as 5nm to 5nm wafers, but different foundries cannot be used, and this is also true after two years." There are also challenges in the process steps. "For hybrid bonding, the fab stops at one of the last copper layers, which is not easy to detect, but that makes shipping to another fab difficult." "We want to develop a new technology to standardize the surface treatment of wafers through a common top layer, and use this layer as a standard interface for wafer stacking, so that different wafers can be manufactured in different ways, but the last set of interfaces is common for bonding between different factories." It also means that bonding can be done by a third party, not just a high-volume factory, "he said. The marks left by the test probe on the copper layer are also a problem for flattening, and these marks must be removed or a non-contact test system used. But he says it has significant advantages. "We can transmit power through optical wafers because the elements are more sparse, there are many through-silicon holes (TSVS) and very short channels, and the elements are located in a single layer by using multiple wavelengths." This makes it possible to transmit power from the top and remove cooling from the bottom in the same system." "In our case, the network on the compute wafer is based on a configurable structure that is set up before the workload is run on the wafer. When you do this with circuit switching in the optical domain, you can evolve electrical switching into the optical domain, but you don't need to do it very often. Cross the moat of Nvidia How wide is Nvidia's moat? That's the $3 trillion question on investors' minds today. At least part of the answer may come later this year in the form of an IPO. Cerebras Systems, an AI startup that is trying to challenge Nvidia on the AI chip battlefield, is set for an initial public offering by the end of 2024. Lior Susan, founder and managing partner of Eclipse Ventures, first invested in Cerebras in 2015, when the company had five presentation slides and theoretical plans for a new computer architecture. Eight years later, the startup offers special large chips with lots of memory for generative AI workloads like model training and reasoning. These are up against Nvidia chips, including the B100 and H100. The most "annoying" thing about competing with Nvidia is CUDA but according to Susan, CUDA is a soft
2024-06-28
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Intel

Intel led the race, joined by Samsung and TSMC

Intel started the race, Samsung joined in, and TSMC waited for the ideal time to form a three-horse race. In the advanced packaging industry, the innovation race has reached a new critical juncture with the advent of glass-core substrates, which Intel announced in September 2023. This new technology direction comes on the heels of the wave of organic and ceramic substrates, promising to overcome the challenge of a core substrate to take performance, efficiency, and scalability to new levels in terms of chip design and manufacturing costs, thus following the megatrends of HPC and AI. The latter depends on the maturity of the technology and its wide application in the end market. picture As a material, glass has been extensively studied and integrated in multiple semiconductor industries. It represents a significant advance in the selection of advanced packaging materials and offers several advantages over organic and ceramic materials. Unlike organic substrates, which have been the dominant technology for many years, glass has excellent dimensional stability, thermal conductivity and electrical properties. picture However, despite the potential benefits, as with any new technology, glass-core substrates face a host of challenges, not only for substrate manufacturers, but also for equipment, materials and inspection tool suppliers. Bilal Hashimi, semiconductor packaging technology and market analyst at Yole Group, said that the fragile nature of glass poses problems for the internal handling and processing of the equipment, which is not suitable for the glass fragments generated when the glass is broken, so great care and precision are required in the manufacturing process. This is an expensive challenge for equipment suppliers and substrate manufacturers. In addition, glass substrates introduce complexity to the inspection and metrology process, requiring specialized equipment and technology to ensure quality and reliability. Despite these challenges, the adoption of glass-core substrates is being driven by several key factors. The need for larger substrates and form factors, coupled with technology trends in chips and heterogeneous integration, is driving the industry to look at glass as a potential solution. In addition, once the technology matures and is widely adopted, the potential cost benefits of glass will make it an attractive option for the high performance computing (HPC) and data center markets. Since last September, Intel's pioneering efforts to support glass-core substrates have laid the foundation for industry-wide adoption. After a decade of research and development effort and investment, and 600 patents related to GCS, Intel's announcement of its plan to select a glass substrate provides guidance and direction to the industry, encouraging other players to explore this promising technology. Just a few months later, Samsung's entry into glass substrate production marked another milestone in the history of this emerging technology, underscoring the impact of Intel's initiatives, growing interest and investment in the technology. In parallel with Intel's efforts, Absolics received its first major investment of $600 million funded by SKC, marking the continued development of GCS. The investment means Absolics is the first company to focus exclusively on producing glass-core substrates, just with a different technology from Intel. In addition, the emergence of new companies such as Absolics and SCHMID, as well as the participation of laser equipment suppliers, display manufacturers, chemical suppliers and others, highlights the diverse ecosystem formed around the emerging supply chain of glass core substrates. Collaborations and partnerships are being established to address the technical and logistical challenges associated with glass substrate manufacturing, demonstrating that all parties are working together to realize its full potential. In this field, the glass through hole (TGV) is one of the pillars of the glass core substrate. The TGV paves the way for more compact and powerful devices. TGV helps to increase the density of interlayer connections. These through-holes help improve signal integrity in high-speed circuits. The reduced distance between connections reduces signal loss and interference, thereby improving overall performance. The integration of TGV can simplify the manufacturing process by eliminating the need for a separate interconnect layer. However, despite its many advantages, the TGV also faces many challenges. Due to the complexity of the manufacturing process, TGVS are more prone to defects that can cause product failure. In addition, TGV usually means higher production costs than other solutions. The need for specialized equipment coupled with the risk of defects may lead to increased production expenses. Recently, many new TGV-related patents have been granted to laser equipment manufacturers such as LPKF. These advances help commercialize glass-core substrat
2024-06-28
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Behind

Behind Nvidia's stunning rise

Huang, 61, always wears a leather jacket, and former employees describe him as a serious but low-key manager. In recent months, he has become a star as his company has become the fulcrum of the artificial intelligence boom. The company's microchips, known as Gpus, are at the heart of how systems like ChatGPT run and have become the most indispensable commodity in the tech world. At a tech conference in Taiwan this month, the Taiwan-born Huang was mobbed by crowds, snapping selfies and dancing with influencers. At one point, a female fan asked him to sign a top on her chest; Huang, after wondering aloud whether this was a good idea, agreed. picture When a social media fan asked who the Nvidia boss was, Mark Zuckerberg called him "the Taylor Swift of tech." This phenomenon is known as the Jensen phenomenon. "That week, my whole social media was' Jason, Jason, Jason. ' At a certain point, you feel like Jason is running the country now, "said Jason Hsu, who focuses on the technology sector. picture If this sounds like a victory, it is well deserved. Huang worked at microchip company AMD before co-founding Nvidia in 1991. At the time, he washed dishes at a Denny's fast-food restaurant (above the table where Huang and his co-founders conceived the company now hangs a plaque, installed when Nvidia was worth more than $1 trillion). The company focused early on video games, developing components that allowed game consoles and personal computers to present three-dimensional graphics by stacking countless tiny triangles. The company went public during the dot-com bubble and was valued at $625 million. While the company has become a major player in the gaming industry, it wasn't until a decade later that it planted the seeds of its current success. In 2012, scientists at the University of Toronto, led by British computer scientist Geoff Hinton, developed an image-recognition program that used Nvidia's graphics chips instead of the central processing unit that most computers rely on. Hinton later described it as the "big bang moment" of today's AI movement. Built on two Nvidia chips purchased from Amazon, the program beat competitors in the annual machine vision race, and its underlying architecture spawned a deep learning boom. Nvidia's chips are perfect for machine vision, which can be said to be an unexpected surprise, but Huang jumped at the chance. While AI is still a secondary academic pursuit compared to the lucrative video game business, Huang told managers that Nvidia will become an AI business and devote resources to developing advanced chips that can power AI. "It turned out to be really useful and we could do things with it that we didn't know about before," says a former Nvidia executive, "but even then you could tell [Huang] had embraced the idea that Gpus could be used for things other than graphics and gaming." "He had a vision at the time that it would do something, and he probably didn't know what it would be, but he saw opportunities that a lot of people didn't see." "He was building a church and had been building it brick by brick for years," Hsu said. "One day you suddenly see this magnificent church in front of you, but he has worked for years to make it perfect." Huang also believes these chips can do more. In 2016, he asked his team to build an AI server using those chips, which ended up being as big as a briefcase and costing $129,000 to make. He then hand-delivered the server to OpenAI as a gift. Currently, tens of thousands of Nvidia chips power OpenAI's ChatGPT. The rewards are now clear. Last month, Nvidia said revenue rose 262 percent to $26 billion in the last quarter. Profits increased more than sevenfold, from $2 billion to $15 billion. The waiting list for the company's superchips runs into next year. Jen-hsun Huang has been building relationships with key customers and suppliers for many years, personally delivering the first orders. At the same time, he has tightly integrated users with a software system that has kept the company on an unassailable lead even as rivals try to get a piece of the action. While Huang appears approachable in public, inside Nvidia he has a reputation for being demanding. Huang even asks junior employees how they are doing and can send hundreds of emails a day to executives. "He's not the type to brag," one former employee said. "There is no hiding place for anyone who can work in Jensen's world, whether successful or unsuccessful." People who struggle with him don't usually respond to mistakes in the right way." "Any weakness, real or imagined, will be pointed out," said another former executive. One of Huang's own missteps came in 2020, when he agreed to buy British microchip company Arm for $40 billion. Nearly two years later, regulators rejected the deal, something Huang still regrets. picture It's not easy to live up to his standards. Huang is known to wake up at 4am (" As a CEO, it's a good choice not to sleep, "he once said).
2024-06-28
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South

South Korea, Japan and the United States pay attention to China's mature process

At a trilateral meeting of senior industry officials in Washington, D.C., on Wednesday, South Korea, the United States and Japan agreed to strengthen cooperation in semiconductor and battery supply chains. South Korean Minister of Trade, Industry and Energy Undergun, US Secretary of Commerce Gina Raimondo and Japan's Minister of Economy, Trade and Industry Ken Saito also pledged further cooperation between the three countries on key minerals, export controls on advanced technologies and implementation of the US-led Indo-Pacific Economic Framework (IPEF). "Our common intention is to use this trilateral mechanism to promote the development of critical and emerging technologies and strengthen the security and resilience of our economies," they said in a joint statement. they "We reaffirm our recognition that semiconductors play an important role in a wide range of industries and applications that are critical to our economic growth and the maintenance of our national security." They also expressed concern that "strategic commodity supply chains may be vulnerable as a result of various non-market policies and practices," an apparent reference to China. In addition, the ministers of Industry of South Korea and Japan met to discuss strengthening bilateral cooperation in the field of clean hydrogen energy. South Korea's Ministry of Trade, Industry and Energy and the U.S. Department of Energy co-hosted the U.S.-Korea Clean Energy Forum in Washington, D.C., on Tuesday. The United States, Japan and South Korea pledged to cooperate more closely on building more resilient supply chains and developing key technologies, including semiconductors and critical minerals. "It is our shared intention to use this trilateral mechanism to promote the development of critical and emerging technologies and to strengthen the security and resilience of our economies," the three countries said in a joint statement after a meeting between US Commerce Secretary Gina Raimondo, Japan's Minister of Economy, Trade and Industry Ken Saito and South Korea's Minister of Industry, Trade and Resources Ken Undergun. For example, the three countries aim to promote the development of rare earth element technology, a field that China currently dominates. Recently, the three countries have expressed concern about "non-market measures" in this area. Eu Competition Commissioner Margrethe Vestager met online with representatives of the three countries ahead of the trilateral meeting to discuss strengthening the supply chain of key technologies. Japanese Finance Minister Saito told a news conference in Washington that the Allies were closely watching Chinese investment in the domestic semiconductor industry. In particular, he pointed to China's rapid capacity expansion in traditional chips, old-generation semiconductors, which are widely used in automotive and other key industries. "Through discussions with the US, South Korea and the EU, I sense that China's excess capacity, including traditional chip manufacturing, is something that Allies are very interested in," said Mr Saito.
2024-06-28
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Japanese

Japanese chip equipment giant, to hire 10,000 people

Tokyo Electrion (TEL, Tokyo Electrion), Asia's largest semiconductor factory Miyagi president Hiromitsu Kamihara said in a joint interview with Taiwan media today that in response to changes in The Times, the rapid development of generative AI and the restart of capital expenditure in the memory industry, TEL has developed a new medium-term development strategy to adopt an active offensive strategy. It plans to invest 1.5 trillion yen (about $10 billion) from fiscal year 2025 to fiscal year 2029, and recruit 10,000 new blood to enjoy AI business opportunities, and aims to become the world's largest semiconductor equipment manufacturer. TEL currently ranks fourth in the global market, only after ASML of the Netherlands, Applied Materials of the United States, and Colin R & D. But TEL is the world's only semiconductor process related to deposition, film, coating development and cleaning four process equipment, and its unique probe machine, is the recent hot CoWoS and co-packaged optical components (CPO) and other advanced packaging key equipment. In other words, when all AI chips need to be produced through wafer foundries, the semiconductor equipment required for the production of AI chips in wafer foundries is mostly provided by TEL. In particular, the semiconductor process into the Hing NA (high numerical aperture) extreme ultraviolet light (EUV) microimaging equipment, more need highly conductive coating development equipment, improve the positive circuit precision, and TEL's current coating development equipment, almost must be closely connected with ASML, so that TEL in this part of the market share of 100%. Kamihara Hiromitsu stressed that TEL's recent development strategy has shifted to an active offensive strategy, mainly optimistic about digital transformation, chip refinement, and AI server related AI accelerators, graphics processors (Gpus) and high-frequency memory, which need to be imported into TEL's equipment to improve chip performance and improve energy consumption and carbon emissions. Accordingly, TEL has decided to increase R&D investment and staff expansion over the next five years. He said TEL plans to invest 1.5 trillion yen ($10 billion) in research and development over the next five years, an increase of up to 80 percent from the previous five-year plan. At the same time, the next five years will also expand the recruitment of 10,000 new blood, in other words, an increase of 2,000 people per year, to meet the market's demand for new product development and equipment. TEL also first exposed the R&D center in Miyagi Prefecture and the largest etching equipment production center in the world. It is understood that this production center in addition to the production of 3nm surround gate (GAA) for customers and 2nm Nanosheet (Nanosheet), is also working on the development of updated coating development equipment below 1nm. Presumably in close cooperation with the Taiwan Defense Sacred Mountain. At the same time, a third R&D center will be built, which is scheduled to be completed and opened in spring 2025. It is understood that the TEL Taiwan branch of Tokyo Electronics Hsinchu Research and Development Center is also expanding the original one-floor clean room to three floors, mainly with the most important customers in Taiwan to simultaneously promote advanced logic front and back chip detection equipment. At the same time, in order to be close to customers' mass production and rapid response, Tainan has also set up an operation center to serve customers nearby. In TEL's revenue last year, AI application-related equipment revenue accounted for 30%, which is also the key to support TEL's decision to expand its military and challenge the world's largest semiconductor equipment manufacturer.
2024-06-28
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